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NXP Semiconductors /MIMXRT1052 /TMR1 /DMA1

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Interpret as DMA1

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15 1211 87 43 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (IEFDE)IEFDE 0 (CMPLD1DE)CMPLD1DE 0 (CMPLD2DE)CMPLD2DE

Description

Timer Channel DMA Enable Register

Fields

IEFDE

Input Edge Flag DMA Enable
CMPLD1DE

Comparator Preload Register 1 DMA Enable
CMPLD2DE

Comparator Preload Register 2 DMA Enable

Links

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Register License

Copyright 2016-2019 NXP All rights reserved.

SPDX-License-Identifier: BSD-3-Clause

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Register Reference

https://github.com/cmsis-svd/cmsis-svd-data